Digi NS9750 Manuale Utente Scaricare il pdf (Pagina 18)

System Memory interface

14       

NS9750B-A1 Datasheet 03/2006

F24 data[7] 8 I/O Data bus signal

E25 data[8] 8 I/O Data bus signal

D26 data[9] 8 I/O Data bus signal

F23 data[10] 8 I/O Data bus signal

E24 data[11] 8 I/O Data bus signal

D25 data[12] 8 I/O Data bus signal

C26 data[13] 8 I/O Data bus signal

E23 data[14] 8 I/O Data bus signal

D24 data[15] 8 I/O Data bus signal

C25 data[16] 8 I/O Data bus signal

B26 data[17] 8 I/O Data bus signal

D22 data[18] 8 I/O Data bus signal

C23 data[19] 8 I/O Data bus signal

B24 data[20] 8 I/O Data bus signal

A25 data[21] 8 I/O Data bus signal

C22 data[22] 8 I/O Data bus signal

D21 data[23] 8 I/O Data bus signal

B23 data[24] 8 I/O Data bus signal

A24 data[25] 8 I/O Data bus signal

A23 data[26] 8 I/O Data bus signal

B22 data[27] 8 I/O Data bus signal

C21 data[28] 8 I/O Data bus signal

A22 data[29] 8 I/O Data bus signal

B21 data[30] 8 I/O Data bus signal

C20 data[31] 8 I/O Data bus signal

E1 data_mask[0] 8 O SDRAM data mask signal

F2 data_mask[1] 8 O SDRAM data mask signal

G3 data_mask[2] 8 O SDRAM data mask signal

F1 data_mask[3] 8 O SDRAM data mask signal

C5 clk_in I SDRAM feedback clock. Connect to clk_out[0].

B4 byte_lane_sel_n[0] 8 O Static memory byte_lane_enable[0] or

write_enable_n[0] for byte-wide device signals

Pin # Signal Name

U/D

(mA)

I/O Description

Table 5: System Memory interface pinout

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 87 88

Nessun commento

Digi NS9750 Manuale Utente Pagina 18